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YDA143
D- 3M
STEREO 15W DIGITAL AUDIO POWER AMPLIFIER Overview
YDA143 (D-3M) is a high efficient digital audio power amplifier IC that operates with a single 12V power supply. An audio power amplifier with a maximum output of 15W (RL=4) 2ch can be configured with one chip. YDA143 has a "Pure Pulse Direct Speaker Drive Circuit" which directly drives speakers while reducing distortion of pulse output signal and reducing noise on the signal, and realizes the highest standard low distortion rate characteristics and low noise characteristics as 15W-class of output digital amplifier IC. In addition, circuit design with fewer external parts can be made depend on the condition of use because corresponds to filter less. YDA143 has 50mW (RL=32) 2ch Class AB headphone amplifiers. YDA143 provides Over-current protection function for speaker output terminals, IC thermal protection function, and POP noise reduction function as well as power-down function and output mute function.
Features
Digital Amplifier Continuous maximum output 15 Wx2ch (VDDP=12.0V, RL=4, THD+N=10% Efficiency 87 % (VDDP=12.0V, RL=4, Po=15W) Distortion Rate (THD+N) 0.04 % (VDDP=12.0V, RL=4, Po=1.5W) S/N Ratio 103dB (VDDP=12.0V, RL=4, Po=15W, GAIN[1:0]=H,H) Channel Separation -65dB (VDDP=12.0V, RL=4, GAIN[1:0]=H,H) Class AB Headphone Amplifier Maximum output 50mWx2ch (VDDP=12.0V, RL=32, THD+N=10 % Distortion Rate(THD+N) 0.01 % (VDDP=12.0V, RL=32, Pho=25mW) S/N Ratio 95dB (VDDP=12.0V, RL=32, Pho=50mW, GAIN[1:0]=H,H) Others Operating power supply range 9.0V to 13.5V Multi-channel synchronizing operation by Master/Slave switching function Carrier frequency switching function 524kHz/466kHz Sleep function with SLEEPN terminal Output muting function with MUTEN terminal Over-current protection function Thermal protection function Clock stop protection function Pop noise reduction function Analog input/BTL (Bridge-Tied Load) output Lead-free 52-pin SSOP (YDA143-EZ)
YDA143 CATALOG CATALOG No.:LSI-4DA143A20 2006.6
YDA143
Terminal configuration
<52-pin SSOP Top View>
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YDA143
Terminal function
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Name HPOR AVSS VSSBGR VREFR INR MUTEN NC VSS VSS PVDDPR PVDDPR OUTPR VSS PVSSR OUTMR PVDDMR PVDDMR VSS VSS NC PROTN SLEEPN DVSS CKIO XO XI I/O O GND GND O I I GND GND Power Power O GND GND O Power Power GND GND O/D I GND I/O O I Function Voltage tolerance LV LV LV LV HV HV HV HV HV HV HV HV LV LV LV LV LV LV LV LV LV HV HV HV HV HV HV LV LV LV HV LV LV
R-ch Headphone Output terminal 5V Analog Ground terminal Ground terminal for Reference Voltage Supply R-ch Reference Voltage terminal (with external capacitor) R-ch Analog Signal Input terminal Mute Control terminal No Connection Ground terminal (This terminal is connected to die-pad of IC) Ground terminal (This terminal is connected to die-pad of IC) R-ch 12V-line VDD terminal R-ch 12V-line VDD terminal R-ch Positive Side Output terminal Ground terminal (This terminal is connected to die-pad of IC) R-ch 12V-line VSS terminal R-ch Negative Side Output terminal R-ch 12V-line VDD terminal R-ch 12V-line VDD terminal Ground terminal (This terminal is connected to die-pad of IC) Ground terminal (This terminal is connected to die-pad of IC) No Connection Warning Signal Output terminal (O/D) Sleep Control terminal Digital Ground terminal Clock Input/Output terminal CERALOCK connection terminal *1 CERALOCK connection terminal *1 Digital Power Supply terminal 27 DVDD I (Connect to REFA terminal outside the IC) 28 MODE0 I Operating Mode Selection terminal 29 MODE1 I Operating Mode Selection terminal 30 MODE2 I Operating Mode Selection terminal 31 GAIN0 I Input Sensitivity Setting terminal 32 GAIN1 I Input Sensitivity Setting terminal 33 NC No Connection 34 VSS GND Ground terminal (This terminal is connected to die-pad of IC) 35 VSS GND Ground terminal (This terminal is connected to die-pad of IC) 36 PVDDML Power L-ch 12V-line VDD terminal 37 PVDDML Power L-ch 12V-line VDD terminal 38 OUTML O L-ch Negative Side Output terminal 39 PVSSL GND L-ch 12V-line VSS terminal 40 VSS GND Ground terminal (This terminal is connected to die-pad of IC) 41 OUTPL O L-ch Positive Side Output Terminal 42 PVDDPL Power L-ch 12V-line VDD terminal 43 PVDDPL Power L-ch 12V-line VDD terminal 44 VSS GND Ground terminal (This terminal is connected to die-pad of IC) 45 VSS GND Ground terminal (This terminal is connected to die-pad of IC) 46 NC No Connection 47 HP I Headphone Control terminal 48 INL I L-ch Analog Signal Input terminal 49 VREFL O L-ch Reference Voltage terminal (with external capacitor) 50 PVDDREG Power 12V-line PVDD terminal for Regulator Circuit 51 REFA O 5V Regulator Output terminal (with external capacitor) 52 HPOL O L-ch Headphone Output terminal (Note) I: Input terminal, O: Output terminal, I/O: Input/Output terminal, O/D: Open drain output terminal LV: Terminal for VREG power supply voltage range as input voltage range. HV: Terminal for VDDP power supply voltage range as input voltage range. *1: CERALOCK which was described above and will be described later is a registered trade mark of Murata Manufacturing Co.,Ltd.
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YDA143
Block diagram
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YDA143
Mode setting
Operating Mode
MODE[2:0] SLEEPN MUTEN PROTN OUT*R
OUT*L
HPOR
HPOL
L H H H H H H H H H H H H H
* L L H H H H H H H * * * *
* L H L L L L L L H * * * *
* * * LLL LLH LHL LHH HLL HHL * LL* LH* HLL HHL
WL WL WL P-H P-L P-H P-L PLS PLS WL -
WL WL WL P-H P-L P-H P-L PLS PLS WL -
WL WL RF WL WL WL WL WL WL SIG -
WL WL RF WL WL WL WL WL WL SIG -
Z Z Z Z Z Z Z Z Z Z -
CKIO
Outline
HP
Z CKIN CKOUT CKIN CKOUT
Sleep mode DA Mute mode *A) HA Mute mode *A) DA External Clock Slave mode *A) DA External Clock Slave mode *A) DA External Clock Master mode *A) DA External Clock Master mode *A) DA Internal Clock Slave mode *A) DA Internal Clock Master mode *A) HA mode *A) 4.19MHz Clock Input 4.19MHz Clock Output 500kHz Input (Internal Clock) 500kHz Output (Internal Clock)
Note: 1) "H" and "L" means logic level High and logic level Low, respectively. 2) "WL" means output disabled (weak pull-down output). "RF" means reference level output. "Z" means Hi-Z. 3) "P-H" means a carrier clock of 524kHz. "P-L" means a carrier clock of 466kHz. "PLS" means a carrier clock of approx. 500kHz (Internally generated clock). 4) "SIG" means an analog audio signal output. 5) "CKIN" means input of a clock with designated frequency. "CKOUT" means output of a designated clock. 6) "DA" means Digital Amplifier. "HA" means Headphone Amplifier. 7) Each output of OUT*L, OUT*R, HPOL, HPOR, PROTN, and CKIO becomes a state as shown in "Protection Mode", depending on the protection state, when entering protection state from a mode except sleep mode. 8) In operating modes indicated by *A), a state of the output signal becomes a state as shown in "Protection Mode" during a protection mode. 9) "HLH" and "HHH" of MODE[2:0] is reserved for system use. Protection Mode
MODE[2:0] SLEEPN MUTEN PROTN OUT*R
OUT*L
HPOR
HPOL
H H H H H
H * * * H
L * * * *
* * * * *
WL WL WL WL WL
WL WL WL WL WL
WL WL WL RF
WL WL WL RF
L L Z -
CKIO
Outline
HP
Z Z Z -
Digital Amplifier Over-current Protection Over-Temperature Protection Clock Stop Protection Low Voltage Malfunction Prevention Protection Power Supply Voltage Fluctuation Protection
Note: 1) Each protection function operates when input terminal is in the designated logic condition. Output terminal becomes a state as shown in the above during protection mode.
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YDA143
Description of operating functions
Digital Amplifier Function
YDA143 has digital amplifiers with analog input, PWM pulse output, Maximum output of 15W (RL=4) 2ch. Distortion of PWM pulse output signal and noise of the signal is reduced by adopting "Pure Pulse Direct Speaker Drive Circuit" First Stage Amplifier Gain Setting Function YDA143 is composed of the first stage amplifier with gain setting control and 18dB fixed-gain digital amplifier. Gain of the first stage amplifier can be set by GAIN[1:0] terminal. Digital Amplifier Gain Setting GAIN[1:0] Gain L L 36dB L H 30dB H L 24dB H H 18dB Input Sensitivity 0.14Vrms 0.28Vrms 0.56Vrms 1.12Vrms Input Impedance (RIN) 12.1k 22.0k 37.1k 56.5k
Connect a 0.22F or more capacitor to the audio signal input terminal (INL and INR) for the rejection of DC signal. And, half voltage of REFA terminal voltage (VREG) is output to the reference voltage terminals (VREFL and VREFR). Connect a 1F or more capacitor to the terminals for voltage stabilization. Carrier Clock Selection Function YDA143 can select the followings by using MODE[2:0] terminal: selection of Internal clock/External clock, selection of Master mode/Slave mode, selection of carrier clock frequency. MODE[2:0] setting and each operating mode
MODE[2:0] L L L L H H H H L L H H L L H H L H L H L H L H Operating Mode External Clock Slave Mode External Clock Master Mode Internal Clock Slave Mode Reserved Internal Clock Master Mode Reserved CKIO terminal 4.19MHz input 4.19MHz output 500kHz input 500kHz output CERALOCK Unnecessary Necessary Unnecessary Unnecessary Carrier Clock Frequency 524kHz 466kHz 524kHz 466kHz 500kHz 500kHz
When using in External Clock Mater Mode, connect a 4.19MHz oscillator (CERALOCK) between XI and XO terminal as shown in Fig. 1. When using in other operating mode, external element to XI and XO terminal is unnecessary. At this time, XI terminal is connected to ground and XO terminal is no connection as shown in Fig. 2.
When using in multi-channel, use one YDA143 (2ch) in Master Mode and use other YDA143 in Slave Mode. At this time, connect CKIO terminal of YDA143 used in Master Mode and that of YDA143 used in Slave Mode. In addition, select the same clock (either Internal Clock or External Clock) in all YDA143. The setting terminal for carrier clock frequency (MODE0) can be changed at any timing. The setting terminal for clock mode (MODE2, MODE1) should be changed during power-off or sleep mode (SLEEPN=L). 6
YDA143
Headphone Amplifier Function
YDA143 has class AB single-ended push-pull headphone amplifier. Headphone amplifier mode can be set by setting HP terminal to H. Audio signal input terminal and voltage reference terminal is common to digital amplifier. Connect DC-cut capacitor to headphone amplifier output terminal (HPOL and HPOR). When a headphone amplifier is not used, HP terminal should be "L" and output terminal (HPOL, HPOR) should be "No Connection". First stage Amplifier Gain Setting function Headphone amplifier is composed of the first stage amplifier of which gain setting is possible, and 0dB fixed-gain amplifier. Gain of the first stage amplifier can be set by GAIN[1:0] terminal. Headphone Amplifier Gain Setting GAIN[1:0] Gain L L 18dB L H 12dB H L 6dB H H 0dB
Input sensitivity 0.14Vrms 0.28Vrms 0.56Vrms 1.12Vrms
Input Impedance (RIN) 12.1k 22.0k 37.1k 56.5k
Control Function
Sleep Function When SLEEPN terminal is L, YDA143 enters the Sleep Mode. In Sleep mode, all the circuit functions including 5V regulator are stopped to minimize the consumption current. At this time, output stages of digital amplifier and headphone amplifier are disabled and PROTN and CKIO terminal output becomes "Hi-Z". Mute Function When MUTEN terminal is set to L while HP terminal is L, YDA143 enters the Digital Amplifier Mute mode. In this mode, output stage of Digital Amplifier is disabled. When MUTEN terminal is set to L while HP terminal is H, YDA143 enters the Headphone Amplifier Mute Mode. In this mode, output stage of Headphone Amplifier outputs the reference voltage. Headphone Selection Function When HP terminal is set to H, YDA143 enters the Headphone Amplifier mode. At this time, output stage of Digital Amplifier is disabled. On the contrary, when HP terminal is set to L, YDA143 enters Digital Amplifier mode. At this time, output of the Headphone Amplifier output is disabled. When logic of HP terminal is changed (H to L level, or L to H level), YDA143 restarts and as the result of it, all the protection states are cleared.
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YDA143
Protection Function
YDA143 has Over-current Protection function and Clock Stop Protection function as protection functions for the digital amplifier. In addition, it has Output Current Limit function as a protection function for headphone amplifier. Moreover, YDA143 has Thermal Protection function, Low-voltage Malfunction Prevention function, and Power Supply Voltage Fluctuation Protection function commonly. Over-current Protection Function This is a function to make the Over-current Protection Mode (disables the output stage of digital amplifier in addition to the output of L signal to PROTN terminal) by detection of short-circuiting (Ground short/Power supply short/Speaker terminal short) in the output stage of digital amplifier. The over-current protection function can be canceled by power off or setting L to SLEEPN terminal and can be automatically returned after the over-current detection by connection of PROTN terminal and SLEEPN terminal. Thermal Protection Function This is a function to make the Thermal Protection Mode (disables the output stage of digital amplifier and headphone amplifier in addition to the output of L signal to PROTN terminal) by detecting extraordinary high temperature of YDA143. This Thermal Protection mode can be cancelled by lowering temperature of YDA143, power off, or setting L to SLEEPN terminal and can be automatically returned after the extraordinary high temperature detection by connection of PROTN terminal and SLEEPN terminal. Clock Stop Protection Function This is a function to make the Clock Stop Protection mode (disables the output stage of digital amplifier) when carrier clock frequency was extraordinarily lowered in digital amplifier mode. The Clock Stop Protection mode can be cancelled by returning carrier clock frequency to the right value. Low-voltage Malfunction Prevention Function This is a function to make the Low-voltage Protection mode (disables the output stage of digital amplifier and headphone amplifier in addition to making "Hi-Z" of PROTN terminal) when voltage at 12V-line power terminal (PVDDREG) becomes lower than Low-voltage detection threshold voltage (VUVPL) or voltage at 5V-line power terminal (REFA, DVDD) becomes lower than the voltage (VUVAL). In addition, when voltage at 12V-line power supply terminal becomes lower than VUVPL, 5V embedded regulator is also disabled. The Low-voltage Protection mode is cancelled when voltage at each power supply terminal exceeded the low-voltage cancellation threshold voltage (VUVPH,VUVAH). Power Supply Voltage Detection Function This is a function to make Mute mode when voltage at 5V Regulator output terminal (REFA) fluctuated (VMH,VML) with respect to twice of the voltage of reference terminals (VREFL,VREFR). Headphone Amplifier Output Current Limit Function YDA143 headphone amplifier has a Current-Limit-Circuit which limits output current so as not to exceed the limit current (IOCHP).
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YDA143
5V Regulator Function
YDA143 outputs 5V to REFA terminal when SLEEPN terminal is H. Connect a 1F or more capacitor to REFA terminal for voltage stabilization. Connect REFA terminal to DVDD terminal on a board. And, do not connect the REFA terminal to other terminals except for DVDD terminal and YDA143 control terminals.
Pop Noise Reduction Function
The Pop Noise Reduction Function works in the following cases: Power-on, Power-off, Sleep ON/OFF, Mute ON/OFF, and switching time between headphone amplifier and digital amplifier. Pop noise at the Power-on, Power-off, and Sleep ON/OFF depends on the value of DC-cut capacitor for audio input signal. The smaller the value, the greater the effect on the pop noise reduction; however, 0.22F or more of capacitance is recommended in the consideration of the low frequency cutoff.
Correspond to Filter less
Normally, when LC filter is not used, carrier signal of 50% modulation comes into speaker even in no input signal state and causes significant loss, and as the result the speaker is heated. Generally, 15W speaker or so is considered to have inductance component of not less than 20H. In the modulation method of YDA143, duty ratio of the carrier signal is several % in no input signal state, so the speaker inductance component can sufficiently inhibit speaker loss without LC filter; therefore, the speaker is not heated.
Speaker Inductance
When YDA143 is used without LC filter, speaker inductance component reduces speaker loss in the MUTE state; therefore, use a speaker with inductance component of 20H or more at the carrier clock frequency.
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YDA143
LC Filter
When connecting LC filters to YDA143, make the following LC filter circuit. Use the following constant in accordance with speaker impedance. By using the following constant, low-pass filter with cutoff frequency=50kHz or so, Q=0.7 or so is configured. LC Filter Constant RL L1 4 10H 6 15H 8 22H
C1 0.47F 0.39F 0.22F
C2 0.01F 0.01F 0.01F
Schottky-diode and snubber circuit
YDA143 should connect Schottky-diode and snubber circuit with the output terminal to prevent IC destruction when the output is short-circuited. Schottky-diode is connected between each output terminal and PVSS. The snubber circuit is connected between positive side output terminal and negative side output terminal. Recommended parts Schottky-diode: ROHM, RB160M-30 Forward current surge peak = 30A or more, Average forward current = 1A or more, Forward voltage (IF=1A) = 0.43V or less Snubber circuit: R=1, C=680pF
Schottky-diode and snubber circuit
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YDA143
Allowable Dissipation
The power dissipation of YDA143 is limited by the junction temperature rating (125) and package thermal resistance (15.6/W). The power dissipation and junction temperature of YDA143 can be found by the following formula. For the use of YDA143, take care not to exceed the power dissipation and junction temperature. Formula for the Power Dissipation Ploss = (Pout Ploss Pout Rpn Rl Idc Vdc Rpn / Rl) 2 + Idc Vdc
Allowable Dissipation (W) Output Power (W) 0.39 (Constant) Load Resistor () 0.040(Constant / at VDDP=12V) 0.030(Constant / at VDDP=9V) 0.045(Constant / at VDDP=13.5V) Power supply voltage (V)
Maximum allowable dissipation of YDA143
Formula for the junction temperature Tj = Ploss Ploss ja Ta ja + Ta
Allowable Dissipation (W) 15.6 (Constant/ package thermal resistance (/W)) Ambient Temperature ()
Package Thermal Resistance
The package (52SSOP) for YDA143 has a Thermal Pad for radiation on the surface. Use this Thermal Pad by soldering on a board. The package's thermal resistance is 15.6/W (4-layer board). This thermal resistance is a value measured under the following conditions: board size 136mmx85mm, 1st layer and 4th layer copper foil board density 154%, 2nd layer and 3rd layer copper foil board density 200%, no wind. In addition, the lower side pattern of the Thermal Pad is connected to all the layers in a board by through holes (0.4).
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YDA143
Application circuit examples
2-channel Operating Mode (Internal Clock Master Mode)
ID C1 C2 C3 C4 C5,C6 C7 C8
Value 0.22F 10F 0.1F 100F 4.7F 330F 680pF
Element Multilayer ceramic capacitor Multilayer ceramic capacitor Multilayer ceramic capacitor Electrolytic capacitor (0.1F Ceramic capacitor) Multilayer ceramic capacitor Electrolytic capacitor Multilayer ceramic capacitor
ID R1 R2 R3 R4 R5 R6 U1 D1
Value Element 100k Chip Resistor 1k Chip Resistor 100k Chip Resistor 1 Chip Resistor 680 Chip Resistor 1M Chip Resistor CERALOCK: CSTCR4M19G53-B0 Schottky-diode: RB160M-30
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YDA143
2-channel Operating Mode (External Clock Master Mode)
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YDA143
Multi-channel Operating Mode (Internal Clock Master Mode/Slave Mode)
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YDA143
Electrical characteristic
Absolute Maximum Ratings
Note 6)
Item Voltage Range of Power supply terminal (VDDP) Voltage Range of SLEEPN, PROTN terminal Voltage Range of CKIO Input/Output terminal Voltage Range of terminals for control Allowable dissipation (Ta=25C) Allowable dissipation (Ta=70C) Junction temperature
Note 4) Note 5) Note 1,2,3)
Symbol VDDP VIN1 VIN2 VIN3 VIN4 PD25 PD70 TJMAX
Min. -0.3 VSS-0.3 VSS-0.3 VSS-0.3 VSS-0.3
Max. 14.0 VDDP+0.3 VREG+1.0 VREG+1.0 VREG+0.3 6.4 3.5 125
Unit V V V V V W W C
Voltage Range of Input/output terminals
Storage temperature TSTG -50 125 C Note 1) VSS means AVSS, VSSBGR, DVSS, PVSSR, PVSSL and VSS. Place all VSS terminals in the same potential. Note 2) All the voltages are measured with respect to VSS=0V. Note 3) Power supply terminal (VDDP) means PVDDREG, PVDDPR, PVDDMR, PVDDPL and PVDDML. Note 4) Control Input/Output terminal means MUTEN, HP, GAIN[1:0] and MODE[2:0]. Note 5) Input/output terminal means INL, VREFL, INR, VREFR, XI and XO. Note 6) Absolute Maximum Ratings is values which must not be exceeded to guarantee device reliability and life, and when using a device in excess even a moment, it may immediately cause damage to device or may significantly deteriorate its reliability
Recommended Operating Condition
Item Power Supply Voltage Speaker Impedance
Note 7)
Symbol VDDP Ta RLS
Min. 9.0 -40 3.75
Typ. 12.0 25 4 32
Max. 13.5 85
Unit V C
Operating Ambient Temperature
Headphone Impedance RLHP 16 Note 7) All the voltages are measured with respect to VSS=0V.
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YDA143
DC Characteristics (VSS=0V, VDDP=12V0.5V, Ta=0C to 85C, unless otherwise specified)
Item REFA Output terminal voltage PROTN terminal Low level output voltage (IOL=1.6mA) CKIO terminal High level output voltage (IOH=-80A) CKIO terminal Low level output voltage (IOL=1.6mA) SLEEPN, CKIO terminal High level input voltage SLEEPN, CKIO terminal Low level input voltage Input terminals for control High level input voltage Input terminals for control Low level input voltage REFA, DVDD terminal Start-up threshold voltage REFA, DVDD terminal Cutoff threshold voltage PVDDREG terminal start-up threshold voltage PVDDREG terminal Cutoff threshold voltage Power Supply Fluctuation Cutoff threshold voltage (lower limit) Power Supply Fluctuation Cutoff threshold voltage (upper limit) Headphone Amplifier limit current Symbol VREG VOLP VOHC VOLC VIH1 VIL1 VIH2 VIL2 VUVAH VUVAL VUVPH VUVPL VML VMH IOCHP 3.7 3.3 8.0 7.6 VREF*1.8 VREF*2.2 50 3.5 1.5 2.2 0.8 4.0 0.5 Min. 4.5 Typ. 5 Max. 5.5 0.4 Unit V V V V V V V V V V V V V V mA
AC characteristics (VSS=0V, VDDP=12V0.5V, Ta=0C to 85C, unless otherwise specified)
Item Master Clock Frequency (Internal clock mode) Clock Stop Detection Carrier Clock Frequency Consumption Current (Sleep mode) Consumption Current (Mute mode) Consumption Current (Digital amplifier output in no-signal input) Symbol FCK FUFP ISLEEP IMUTE IDDD Min. Typ. 500 150 1 20 40 Max. Unit kHz kHz A mA mA
Consumption Current (Headphone output in no-signal input) IDDH 10 mA Note 1) 4 resistor and 30H coil are used as an output load in order to obtain various digital amplifier characteristics.
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YDA143
Analog Characteristics (VSS=0V, VDDP=12V, Ta=25C, Frequency:1kHz, unless otherwise specified)
Digital Amplifier Section Item Maximum Output (THD+N=10%) Voltage Gain (at 1V input sensitivity) Total Harmonic Distortion Rate (BW: 20kHz) Signal /Noise Ratio (BW: 20kHz A-Filter) Channel Separation Ratio Maximum Efficiency RL=4, PO=1.5W RL=4, PO=15W, GAIN[1:0]=H,H GAIN[1:0]=H,H RL=4, PO=15W Condition RL=4 Symbol PO AV THD+N SNR CS Min. Typ. 15.0 18 0.04 103 -65 87 Max. Unit W dB % dB dB %
Output Offset Voltage Vo 20 mV Note) All the values of analog characteristics were obtained by using our evaluation circumstance. Depending upon parts and pattern layout to use, characteristics may be changed. 4 resistor and 30H coil are used as an output load in order to obtain various digital amplifier characteristics. Headphone Amplifier Section Item Maximum Output (THD+N=10%) Total Harmonic Distortion Rate (BW: 20kHz ) Signal /Noise Ratio (BW: 20kHz A-Filter ) Channel Separation Ratio RL=32 RL=32, Pho=25mW RL=32, Pho=50mW, GAIN[1:0]=H,H GAIN[1:0]=H,H Condition Symbol Pho THD+N SNR CS Min. Typ. 50.0 0.01 95 -75 Max. Unit mW % dB dB
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YDA143
Typical characteristics examples
Digital Amplifier Characteristics (VDDP=12V, RL=4+30H, Frequency=1kHz, GAIN[1:0]=H,H, MODE[2:0]=L,H,L, unless otherwise specified
Frequency vs THD+N (Po=1.5W with 20kHz filter)
10 Lch 1 THD+N[%] Rch
100
Power vs THD+N (Freq=1kHz, with 20kHz filter)
Lch Rch
10 THD+N[%]
1
0.1
0.1
0.01
0.01 0.001 0.01 0.1 Power[W] 1 10 100
0.001 100 1000 Frequency[Hz] 10000 100000
Noise FFT
0 -20 Noise Level[dBV] -40 -60 -80 -100 -120 -140 -160 10 100 1000 Frequency[Hz] 10000 100000 5 0 10 Rch Lch 20 Gain[dBV] 15 10 30 25
Frequency Responce
Lch Rch 100 1000 Frequency[Hz] 10000 100000
Power vs Efficiency
100 95
Power supply voltage vs Maximum output power (THD+N=10%)
25 4ohm Maximum output power[W] 20 15 10 5 0 6ohm 8ohm
90 85 Efficiency[%] 80 75 70 65 60 55 50 0 5 10 Power[W] 15 20 4ohm 6ohm 8ohm
8
9
10
11 12 13 Power supply voltage[V]
14
15
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YDA143
Headphone Amplifier Characteristics (VDDP=12V, RL=32, Frequency=1kHz, GAIN[1:0]=H,H, MODE[2:0]=L,H,L, unless otherwise specified)
Power vs THD+N (Freq=1kHz)
100 Lch 10 THD+N[%] 1 0.1 0.01 0.001 0.01 0.1 1 Power[mW] 10 100 Rch 10 1 100 Lch Rch
Frequency vs THD+N (Pho=25mW)
0.001 100 1000 Frequency[Hz] 10000 100000
THD+N[%]
0.1
0.01
Noise FFT
0 -20 -40 Noise Level[dBV] -60 -80 -100 -120 -140 -160 10 100 1000 Frequency[Hz] 10000 100000 Lch Rch
Frequency Responce
10 5 0 Gain[dBV] -5 -10 -15 -20 10 100 1000 Frequency[Hz] 10000 100000 Lch Rch
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YDA143
Package outline
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YDA143
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YDA143
Notice
The specifications of this product are subject to improvement changes without prior notice.

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